The present invention relates generally to circuit verification, and more particularly to identifying unknown sources for logic built-in self test in verification.
Logic built-in self test (LBIST) is a test method that executes a main test loop of a chip (circuit) with minimal dependences on an external tester. This approach of testing uses a pseudo random pattern generator (PRPG) to provide a pattern stimulus, and a multi input signature register (MISR) to capture a response. An on product clock generator (OPCG) logic generates a clock sequence for testing. The PRPG generates a test pattern that is applied into the LBIST scan channels via a scan. The response from the scan channels after a capture clock sequence is compressed in MISR(s), which is generally termed a signature. Once the chip is initialized, only a reference clock is needed from the test equipment or circuit board, therefore MISR(s) have an advantage of efficiently compressing the response data. To have a well defined signature in a MISR at the end of a test, all response data collected into the MISR must be predictable, and as such, there cannot be any X-states in the chip going to a MISR. For example, where there is a timing sensitive path that gives a deterministic response only after two cycles, this would be considered an X (i.e., an unknown) for one cycle tests, and must be blocked from being captured into a MISR.